IBIS Macromodel Task Group Meeting date: 29 Nov 2011 Members (asterisk for those attending): Agilent: * Fangyi Rao Radek Biernacki Altera: * David Banas Ansys: Samuel Mertens * Dan Dvorscak * Curtis Clark Arrow Electronics: Ian Dodd Cadence Design Systems: Terry Jernberg * Ambrish Varma Celsionix: Kellee Crisafulli Cisco Systems: Ashwin Vasudevan Syed Huq Ericsson: Anders Ekholm IBM: Greg Edlund Intel: Michael Mirmak LSI Logic: Wenyi Jin Mentor Graphics: * John Angulo Zhen Mu * Arpad Muranyi Vladimir Dmitriev-Zdorov Micron Technology: Randy Wolff NetLogic Microsystems: Ryan Couts Nokia-Siemens Networks: * Eckhard Lenski QLogic Corp. James Zhou Sigrity: Brad Brim Kumar Keshavan * Ken Willis SiSoft: * Walter Katz Todd Westerhoff Doug Burns * Mike LaBonte Snowbush IP: Marcus Van Ierssel ST Micro: Syed Sadeghi Teraspeed Consulting Group: Scott McMorrow * Bob Ross TI: Casey Morrison Alfred Chong Vitesse Semiconductor: Eric Sweetman Xilinx: Mustansir Fanaswalla The meeting was lead by Arpad Muranyi ------------------------------------------------------------------------ Opens: - None -------------------------- Call for patent disclosure: - None ------------- Review of ARs: - None ------------- New Discussion: Arpad showed a new Model_types BIRD proposal: - David: The added text for Usage Rules should have "or" instead of "and" - Arpad made those changes - There were no other comments - Bob motioned to approve for submittal - David seconded - No one opposed, the motion passed by acclamation AR: Arpad submit modified Model_types BIRD to Open Forum Arpad showed BIRD 140.1: - Bob: In V-t the "T" should be uppercase - In the last change paragraph the i.e. should have a comma - Curtis: "device" is misspelled "deice" at the end of a paragraph. - Ambrish: The same error is found on page 3 - No, that is the same place - Bob: The added text for pgs. 107 & 125 is not OK for 125 - Arpad: Could we have a buffer model in an [External Circuit]? - Bob: [External Model] would be used for that - Arpad: That was an interim solution - [External Circuit] is a more general solution, suitable for models too - Bob: This whole area is not very clear - Arpad showed page 125 of IBIS 5.0 - Walter: For buffer models min/typ/max means slow/typ/fast - Interconnect may be independent of process corners - Arpad: [External Circuit] is usually on-die routing - Would min/max be independent of process corner? - Walter: That would be correlated - Arpad: Section 9 already establishes a min/max - slow/fast relationship - Mike: The page 125 change might begin with "Circuits" instead of "Models" - David: A user validating setup and hold would the shortest etch - Ken: Impedance would be different - Walter: We should talk in the context of derivation methods - Arpad: Would leave this change off page 125 for now - Bob: That would be good until we have better wording - Arpad altered the BIRD to change only page 107 - Fangyi: It no longer says there is no fast/slow relationship between AMI and IBIS? - Arpad highlighted a section that replaces that - Arpad: We are replacing most slow/fast with min/max for AMI purposes - Fangyi: AMI Range parameters will have no relationship to IBIS corner - Arpad highlighted a paragraph that explains AMI to IBIS relationships - Fangyi: It should say "AMI" and "IBIS" to be more clear - Arpad made changes to the paragraph about Range - Bob motioned to submit this to Open Forum as modified - It should also say that page 125 is not modified - Arpad will add that - Ken seconded - No one opposed, the motion passed by acclamation AR: Arpad submit BIRD 140.1 with modifications to Open Forum Walter showed an email about BIRD 123.3 - Walter: The contentious issue is that Rx_Rj, Rx_DCD, Rx_Sj apply to both TD and statistical - David: How can we combine DCD and Sj to one deterministic jitter parameter like Rx_Dj? - There should be a new parameter for that - Fangyi: Is Dj a number or distribution - David: We have tabled spectral functions - Walter: We need a mathematical description of that - Hopefully EDA vendors can resolve this offline - Fangyi: Can this be ignored in statistical? - Walter: The question is if it can be ignored in statistical mode - David: If a model returns ideal clock times is it TD or statistical? - Walter: In the 2nd case these parameters would not be used if the model returns clock_ticks - Fangyi: Is the 1st case processed by the tool? - Walter: 1st case applies when you have Getwave with or without clock_times - 2nd case is only Getwave with clock_times AR: David write mathematical description of combined Dj proposal - Walter: Most vendors have touchstone implementations - Can we allow S12 = 0 and S12 != S21? - Should there be E elements to isolate Touchstone calls? - BIRD 120 allows any number of corner values - Ambrish and Arpad have not yet shown this in their proposals - David: What is pad? - Walter: Where the die connects to the package - This is in the silicon - It can be used where there is a T-coil to reduce effective C_comp - Fangyi: The first circuit is incomplete, no termination - The E element helps - Walter: The 1st will work if connected to a voltage source - Fangyi: The E elements are needed only for TX? - Walter: We assume the RX input is high impedance - Either the EDA tool puts it in or the subcircuit has it - Fangyi: S12 and S21 have a physical meaning - The magnetic field is affected - Walter: How do we handle these s-parameters from IBM? - Fangyi: The model vendor must generate a proper s-parameter model AR: Ambrish and Arpad produce examples of 5 corners with Touchstone files in their proposals Meeting ended. ------------- Next meeting: 06 Dec 2011 12:00pm PT Next agenda: 1) Task list item discussions ------------- IBIS Interconnect SPICE Wish List: 1) Simulator directives